The effects of concentration due to the lines of the terrestrial magnetic field and of attenuation due to the terrestrial atmosphere mean that the consequences of bombardment by particles of cosmic origin on the electronic equipment are marginal at sea level in the tropical or temperate regions where the major part of the globe's population is concentrated. This is no longer the case at the low latitudes in the vicinity of the poles or at high altitudes where the density of neutrons is about 1000 times as great.
The electronic equipment of satellites which cruise at very high altitude and aircraft which may be required during long-haul flights to cruise for long periods at low latitudes and at high altitudes must therefore be designed to resist the stresses related to bombardment by particles of cosmic origin. Such is not the case for off-the-shelf electronic equipment made in very large production runs and which are devised without taking account of stresses related to bombardment by particles of cosmic origin since they are developed to satisfy the widest possible markets situated in the temperate and tropical regions, at medium or low altitude.
In the aeronautical context, that is to say with a neutron bombardment intensity 1000 times as high as at sea level at medium latitudes, the off-the-shelf electronic components, notably of RAM (Random Access Memory) type, are presumed to be able to exhibit failures of the single event type SEU (the acronym standing for the expression: “Single Event Upset”) consisting of the inversion of the content of an isolated bit, with a probability of about 10−8 per bit and per hour. Such a figure is unacceptable for computers fulfilling critical functions and calling upon memories with several million bits since the mean time between two failures, of the order of only a few tens of hours, is incompatible with the security objectives sought. Certain recent publications also describe the possibility of multiple errors M.E.U (the acronym standing for the expression: “Multiple Event Upset”) consisting in the inversions of the contents of several bites on one and the same memory component with probabilities that are about 100 times lower.
To alleviate this kind of failure of off-the-shelf electronic components of memory type as well moreover as errors due to transmission noise, it is known to make the storage and transmission of information tolerant to errors by employing error corrector codes of “Hamming” or “Reed-Solomon” type which add a certain redundancy to the information stored or transmitted. The error corrector codes of Reed-Solomon type which are more redundant than the error corrector codes of Hamming type are particularly adapted to protection in relation to M.E.U. events insofar as they make it possible to correct consecutive errors and therefore multiple errors situated in one and the same memory component.
Computers call upon one or more electronic components termed “processors or central unit” exchanging information through physical links termed “system buses” or “internal buses” with electronic components of random-access memory type and through other physical links termed “expansion buses” or “input/output buses” with peripheral equipment. The auxiliary functions for controlling the data exchanges between central unit and central random-access memory as well as between central unit and peripheral equipment are termed “bridge” functions.
The “bridge” auxiliary functions are often entrusted with other auxiliary functions for specialized electronic components termed “North bridge or memory controller”, “South bridge or input-output controller”, which are designed to make it possible to effectively interconnect a central unit with random-access memories and peripheral equipment by best exploiting the cache architecture of the central unit and sequential modes of access to the memory making it possible to maximize the bandwidth.
Certain processor electronic components integrate the “bridge” functions directly by offering several bus interfaces and a memory controller interfacing directly with a bank of random-access memory components.
The most recent electronic components of “bridge” type or of processor type with integrated “bridge” functions also incorporate Hamming-type error corrector codes into the information exchanged with electronic components of random-access memory type, making it possible to correct any single fault (inversion of a bit) and to detect any failure affecting 2 bits but which may be upset by MEU multiple errors generally affecting an arbitrary number of bits inside one and the same random-access memory component, for which only the error corrector codes of Reed-Solomon type are effective.
For critical onboard applications, it is of course possible to develop a specific “bridge” electronic component furnished with error corrector codes of Reed-Solomon type. Nevertheless, this approach comes up against the following disadvantages:                since the market for a specific electronic component such as this, having a “bridge” function, is limited to the aeronautical and satellite sectors, it cannot generate the quantities that might allow amortization of its development which will moreover remain expensive and uncertain while producing a result below the performance achievable through an off-the-shelf product benefiting from the most recent technologies. Briefly, this development will be expensive and will give rise to an expensive product whose production lifetime will remain short;        on account of its specific nature, the component thus developed will not be able to exploit upgrades of off-the-shelf software which will preferably be based on electronic components aimed at a global market.        